This invention relates to semiconductor devices, and more particularly to a thin-layer silicon-on-insulator (SOD) high-voltage device structure which employs multiple three-dimensional metal-oxide semiconductor (MOS) capacitor structures to achieve multi-dimensional depletion of the drift charge to improve the breakdown-voltage specific xe2x80x9conxe2x80x9d resistance figure-of-merit across a wide range of application voltages.
There has been various SOI high voltage device structures in which a field plate construction and drift region doping are used to improve the breakdown voltage specific xe2x80x9conxe2x80x9d resistance figure-of-merit. Improved xe2x80x9conxe2x80x9d resistance for low voltage application has been obtained using trench device structures in bulk silicon technology. Other thin-layer high voltage devices have improved current driving capability.
Recently, multi-dimensional depletion in the drift region has been achieved by inserting shaped PN-junctions into the graded-doped drift region of the device. Thus, the device could support high voltages with higher levels of charge in the drift region, without extensive thermal oxidation process steps. However, there is an alternative structure in which a MOS dielectric can be used to support higher sustainable electric fields. Such a construction can be used to improve the breakdown voltage specific xe2x80x9conxe2x80x9d resistance figure-of-merit.
The present invention contemplates a thin-layer silicon-on-insulator (SOI) high voltage device comprising a semiconductor substrate and a three-dimensional MOS multi-capacitor structure which forms a depletable drift region. The three-dimensional MOS multi-capacitor structure includes a striped geometry of parallel thin, SOI stripes, wherein each SOI stripe is individually circumscribed longitudinally by a respective dielectric layer formed on the semiconductor substrate, and a conducting multi-capacitor field plate layer superimposed on top of the respective dielectric layer and between adjacent dielectric layers circumscribing longitudinally adjacent SOI stripes.